EP20K30EQC208-2 vs EP20K30EQC208-3 Comparison

Detailed side-by-side comparison of EP20K30EQC208-2 by Intel and EP20K30EQC208-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K30EQC208-2 EP20K30EQC208-3
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.92 $62.00
Family APEX 20KE β€”
Device Logic FPGA (SRAM-based) β€”
Typical Gates 30,000 β€”
Logic Elements 1,200 β€”
Embedded Memory (RAM bits) 24,576 β€”
Maximum User I/O 125 β€”
Dedicated Inputs 4 β€”
Package 208-BFQFP (PQFP-208) 208-BFQFP (PQFP, 28x28 mm)
Speed Grade -2 (2.69 ns pin-to-pin) -3
Core Supply Voltage 1.71 V to 1.89 V β€”
I/O Standard LVDS-compatible, 1.8 V / 2.5 V / 3.3 V (per bank) β€”
Maximum Clock Frequency 160 MHz β€”
Propagation Delay 2.69 ns β€”
Configuration Interface IEEE 1149.1 JTAG, Passive serial, Active serial β€”
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C
Process Technology 1.8 V CMOS, MultiCore architecture β€”
Mounting Type Surface Mount (PQFP with gull-wing leads) Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance status] Compliant (per Rochester listing)
MSL Level [DATA_NEEDED: MSL rating] β€”
Series β€” APEX-20KE
Core Voltage Supply β€” 1.71 V to 1.89 V
Total Logic Elements β€” 1200
Total Gates β€” 30000
Total RAM Bits β€” 24576
User I/O Count β€” 125
Number of LABs/CLBs β€” 120
Operating Frequency (Max) β€” 435 MHz
Technology Process β€” 0.22 Β΅m CMOS
Number of Pins β€” 208
Programming Interface β€” JTAG (IEEE 1149.1)

Datasheets & Resources

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