EP20K400BC652-2AA vs EP20K400FC784-2 Comparison
Detailed side-by-side comparison of EP20K400BC652-2AA by Intel and EP20K400FC784-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400BC652-2AA | EP20K400FC784-2 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $175.00 |
| Product Type | Field-programmable gate array (FPGA) | β |
| Series | APEX-20K | β |
| Number of LABs/CLBs | 1664 | β |
| Number of Logic Elements/Cells | 16640 | β |
| Total RAM Bits | 212992 bit | β |
| Number of I/O | 502 | β |
| Number of Gates | 1052000 | β |
| Supply Voltage | 2.375 V to 2.625 V | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | 0 Β°C to 85 Β°C (TJ) | [DATA_NEEDED: exact Tj range] |
| Package | 652-BGA | 784-Ball FineLine BGA (FC) |
| Supplier Device Package | 652-BGA (45x45) [DATA_NEEDED: target-device package dimensions] | β |
| Part Status | Obsolete | β |
| Configuration Memory Technology | [DATA_NEEDED: configuration memory technology] | β |
| Maximum User I/O Frequency | [DATA_NEEDED: maximum user I/O frequency] | β |
| Core Logic Voltage | [DATA_NEEDED: core logic voltage] | β |
| Typical Supply Current | [DATA_NEEDED: typical supply current] | β |
| RoHS Status | unknown | [DATA_NEEDED: not confirmed in provided data] |
| REACH Status | unknown | β |
| AEC-Q100 Qualification | unknown | β |
| Family | β | APEX 20K |
| Device Family Member | β | EP20K400C |
| Typical System Gates | β | 400,000 |
| Maximum User I/O Pins | β | 488 (784-BGA) |
| Logic Elements | β | 16,640 |
| Embedded RAM (ESB) | β | 212 Kbits |
| Maximum Block RAM | β | [DATA_NEEDED: block RAM organization per ESB] |
| Maximum Frequency (internal) | β | [DATA_NEEDED: fmax, datasheet-dependent] |
| Process Technology | β | 0.22 Β΅m CMOS SRAM |
| Core Voltage | β | 2.5 V |
| MultiVolt I/O Voltage | β | 1.8 V / 2.5 V / 3.3 V |
| Supported I/O Standards | β | LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT |
| Configuration Mode | β | Serial / Parallel SRAM-volatile (external PROM required) |
| Speed Grade | β | -2 (industrial) |
| MSL Level | β | 3 (per Partstack listing) |
| Peak Reflow Temperature | β | 220 Β°C (per Partstack listing) |
| Hot Socketing | β | Supported |
| JTAG / Boundary-Scan | β | IEEE 1149.1 compliant |