EP20K400CB652C8N vs EP20K400CB652I7 Comparison

Detailed side-by-side comparison of EP20K400CB652C8N by Intel and EP20K400CB652I7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CB652C8N EP20K400CB652I7
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $155.00 $149.50
Family APEX 20KC APEX 20KC
Device Logic Elements 16640 β€”
System Gates 400000 β€”
Process Technology 0.15 um CMOS, all-layer copper 0.15 Β΅m CMOS
Core Supply Voltage 1.8 V (1.71 V to 1.89 V) 1.8 V
I/O Supply Voltage 2.5 V 1.8 V / 3.3 V
User I/Os 502 β€”
Programmable I/O Lines 488 β€”
Inputs 484 β€”
Outputs 480 β€”
Propagation Delay 2.5 ns β€”
Internal Operating Frequency 301.21 MHz β€”
Package BGA-652 BGA-652 (652-ball)
Logic Family CMOS β€”
Operating Temperature 0 C to +85 C β€”
PCI Support PCI Local Bus 2.2, 33/66 MHz, 32/64-bit β€”
Memory Support DDR SDRAM, ZBT SRAM β€”
Architecture MultiCore (LUT + embedded system blocks) β€”
RoHS Status unknown Non-compliant (JESD-609 e0, contains lead)
Device Family β€” Field-Programmable Gate Array (FPGA)
Typical Gates β€” 400,000
Logic Elements (LEs) β€” 16,640
Maximum Operating Frequency β€” 375.94 MHz
Package Code (JESD-30) β€” S-PBGA-B652
Terminal Form β€” Ball
Package Shape β€” Square
Maximum User I/O Pins β€” [DATA_NEEDED: max user I/O]
Embedded Memory β€” Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM
Configuration Method β€” SRAM + JTAG (ISP)
Speed Grade β€” 7
Temperature Grade β€” Industrial (-40 Β°C to +100 Β°C)
Manufacturer Status β€” Obsolete (Intel/Altera legacy FPGA)

Datasheets & Resources

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