EP20K400CB652C9ES vs EP20K400CB652C9N Comparison
Detailed side-by-side comparison of EP20K400CB652C9ES by Intel and EP20K400CB652C9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400CB652C9ES
EP20K400CB652C9ES - 400K Gates APEX 20KC FPGA | Intel (Altera)
EP20K400CB652C9ES NrndIntel
EP20K400CB652C9N
EP20K400CB652C9N - APEX 20KC FPGA 400K Gates BGA-652 | Intel
EP20K400CB652C9N NrndSpecification Comparison
| Parameter | EP20K400CB652C9ES | EP20K400CB652C9N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $195.00 |
| Series | APEX 20KC | EP20K400 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 16640 | β |
| Total System Gates | 400000 | β |
| Embedded Memory (Bits) | 212992 | β |
| Number of User I/O | 488 | β |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | β |
| Number of Logic Array Blocks | 1040 | β |
| Maximum Operating Frequency | 250 MHz | β |
| Core Voltage | 1.8 V | β |
| Process Technology | 0.15 Β΅m CMOS | β |
| Operating Temperature Range | 0Β°C to +85Β°C (Commercial) | 0 Β°C to +85 Β°C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| Package / Case | 652-BGA | β |
| MSL Level | 3 (168 Hours) | β |
| Packaging | Tray | β |
| Programmability Type | In-system programmable (SRAM-based) | β |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL | β |
| JTAG (IEEE 1149.1) | Yes | β |
| PLL | Yes (4-phase) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Unknown (legacy Altera part - verify with distributor) |
| Device Type | β | Programmable Logic Device (SOPC FPGA) |
| Architecture | β | MultiCore (LUT logic + Embedded System Blocks) |
| System Gates | β | 400,000 |
| Logic Elements | β | 16,640 |
| Maximum User I/Os | β | 502 |
| Total Memory Bits | β | 212,992 (per chip) |
| Maximum Internal Frequency | β | 250 MHz |
| Propagation Delay | β | 2.0 ns |
| Logic Family | β | CMOS |
| Core Process Technology | β | 0.15 Β΅m all-layer copper CMOS |
| Core Supply Voltage (VCCINT) | β | 1.8 V |
| I/O Supply Voltage (VCCIO) | β | 2.5 V |
| Package | β | BGA-652 (Plastic Ball Grid Array, 652 balls) |
| Configuration Interface | β | IEEE 1149.1 JTAG, serial passive parallel async |