EP20K400CB652C9N vs EP20K400CB652I7 Comparison
Detailed side-by-side comparison of EP20K400CB652C9N by Intel and EP20K400CB652I7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400CB652C9N | EP20K400CB652I7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $149.50 |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | β |
| Device Type | Programmable Logic Device (SOPC FPGA) | β |
| Architecture | MultiCore (LUT logic + Embedded System Blocks) | β |
| System Gates | 400,000 | β |
| Logic Elements | 16,640 | β |
| Maximum User I/Os | 502 | β |
| Total Memory Bits | 212,992 (per chip) | β |
| Maximum Internal Frequency | 250 MHz | β |
| Propagation Delay | 2.0 ns | β |
| Logic Family | CMOS | β |
| Core Process Technology | 0.15 Β΅m all-layer copper CMOS | β |
| Core Supply Voltage (VCCINT) | 1.8 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V | β |
| Operating Temperature Range | 0 Β°C to +85 Β°C (Commercial) | β |
| Package | BGA-652 (Plastic Ball Grid Array, 652 balls) | BGA-652 (652-ball) |
| Mounting Type | Surface Mount | β |
| Configuration Interface | IEEE 1149.1 JTAG, serial passive parallel async | β |
| RoHS Status | Unknown (legacy Altera part - verify with distributor) | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | β | Field-Programmable Gate Array (FPGA) |
| Typical Gates | β | 400,000 |
| Logic Elements (LEs) | β | 16,640 |
| Maximum Operating Frequency | β | 375.94 MHz |
| Process Technology | β | 0.15 Β΅m CMOS |
| Core Supply Voltage | β | 1.8 V |
| I/O Supply Voltage | β | 1.8 V / 3.3 V |
| Package Code (JESD-30) | β | S-PBGA-B652 |
| Terminal Form | β | Ball |
| Package Shape | β | Square |
| Maximum User I/O Pins | β | [DATA_NEEDED: max user I/O] |
| Embedded Memory | β | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | β | SRAM + JTAG (ISP) |
| Speed Grade | β | 7 |
| Temperature Grade | β | Industrial (-40 Β°C to +100 Β°C) |
| Manufacturer Status | β | Obsolete (Intel/Altera legacy FPGA) |