EP20K400CB652I8N vs EP20K400CB652I7 Comparison

Detailed side-by-side comparison of EP20K400CB652I8N by Altera and EP20K400CB652I7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CB652I8N EP20K400CB652I7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $115.00 $149.50
Family APEX 20KC APEX 20KC
Logic Elements 16,640 β€”
System Gates 400,000 β€”
Macrocells 1664 β€”
Number of User I/O 488 β€”
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] β€”
Number of Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] β€”
Number of PLLs 4 β€”
Embedded Memory (Max) [DATA_NEEDED: total embedded memory bits] β€”
Maximum Operating Frequency 301.21 MHz 375.94 MHz
Process Technology 0.15 Β΅m CMOS 0.15 Β΅m CMOS
Core Voltage 1.8 V β€”
I/O Voltage (MultiVolt) 1.5 V / 1.8 V / 2.5 V / 3.3 V β€”
Operating Temperature (Industrial) -40Β°C to +100Β°C β€”
Speed Grade 8 7
Package 652-pin BGA BGA-652 (652-ball)
Mounting Type Surface Mount β€”
Configuration Interface JTAG / Passive Serial β€”
RoHS Status unknown Non-compliant (JESD-609 e0, contains lead)
Lead-Free unknown β€”
Design Tool Altera Quartus II (APEX 20KC support) β€”
Device Family β€” Field-Programmable Gate Array (FPGA)
Typical Gates β€” 400,000
Logic Elements (LEs) β€” 16,640
Core Supply Voltage β€” 1.8 V
I/O Supply Voltage β€” 1.8 V / 3.3 V
Package Code (JESD-30) β€” S-PBGA-B652
Terminal Form β€” Ball
Package Shape β€” Square
Maximum User I/O Pins β€” [DATA_NEEDED: max user I/O]
Embedded Memory β€” Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM
Configuration Method β€” SRAM + JTAG (ISP)
Temperature Grade β€” Industrial (-40 Β°C to +100 Β°C)
Manufacturer Status β€” Obsolete (Intel/Altera legacy FPGA)

Datasheets & Resources

Browse All Products Create BOM Request Quote