EP20K400CF672C9 vs EP20K400CF672I9 Comparison
Detailed side-by-side comparison of EP20K400CF672C9 by Altera and EP20K400CF672I9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400CF672C9 - APEX-20K 400K Gates FPGA, 672-FBGA | Intel / Altera
EP20K400CF672C9 Obsolete
Specification Comparison
| Parameter | EP20K400CF672C9 | EP20K400CF672I9 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $390.40 | $120.00 |
| Series | APEX-20KC | β |
| Logic Family / Architecture | MultiCore (LUT + ESB) | β |
| System Gates | 400,000 | 400,000 |
| Logic Cells / Elements | 16,640 | β |
| Maximum User I/Os | 488 | β |
| Package / Case | 672-BBGA, FCBGA | β |
| Supplier Device Package | 672-FBGA (27x27 mm) | β |
| Ball Pitch | 1.0 mm | β |
| Core Supply Voltage | 2.5 V | β |
| I/O Supply Voltage | [DATA_NEEDED: I/O VCCIO range] | β |
| Process Technology | 0.22 um CMOS | 0.15 Β΅m CMOS |
| Internal Maximum Frequency | 368 MHz | β |
| Propagation Delay | 2.5 ns | β |
| Operating Temperature | 0C to +85C (Commercial) | -40Β°C to +85Β°C (Industrial) |
| Embedded Memory | Embedded System Blocks (ESB) | β |
| Configuration Method | Serial / Parallel PROM | β |
| RoHS Status | RoHS non-compliant (legacy) | Non-compliant (e0 terminal finish indicates SnPb) |
| Mounting Type | Surface Mount | β |
| Family | β | APEX 20KC |
| Logic Elements | β | 16,640 cells |
| Maximum Operating Frequency | β | 250 MHz |
| Embedded RAM | β | 212,992 bits |
| Embedded System Blocks (ESBs) | β | 104 |
| Maximum User I/O Pins | β | [DATA_NEEDED: max user I/O count] |
| Core Voltage | β | 1.8 V |
| I/O Voltage | β | 1.8 V / 3.3 V (MultiVolt) |
| Package | β | 672-ball FC-FBGA (FineLine BGA) |
| Package Pitch | β | 1.0 mm |
| Speed Grade | β | I9 (Industrial) |
| Moisture Sensitivity Level (MSL) | β | 3 |
| Terminal Finish | β | e0 (Tin-Lead, per JESD-609) |