EP20K400FI672-2 vs EP20K400FC672-1XGZ Comparison
Detailed side-by-side comparison of EP20K400FI672-2 by Altera and EP20K400FC672-1XGZ by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 ObsoleteIntel
EP20K400FC672-1XGZ - 400K Gate APEX-20KE FPGA, 502 I/O, 672-FBGA | Intel
EP20K400FC672-1XGZ ObsoleteSpecification Comparison
| Parameter | EP20K400FI672-2 | EP20K400FC672-1XGZ |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.40 | $195.00 |
| Family | APEX-20K | APEX-20KE |
| Logic Elements | 16640 | β |
| Maximum Gates | 400,000 gates | β |
| User I/Os | 502 | β |
| Embedded Memory Bits | 212992 | 212,992 |
| Number of Macros | 1664 | β |
| Process Technology | 0.22 Β΅m CMOS | β |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Maximum Internal Frequency | 200 MHz | β |
| Propagation Delay | 2.5 ns | 2.5 ns (per DigiChip listing) |
| Operating Temperature | 0 Β°C to +85 Β°C (Commercial) | 0C to +85C (commercial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | β |
| PLLs (Phase-Locked Loops) | 4 | β |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | β |
| RoHS Status | Lead-free / RoHS Compliant | Unknown (legacy part, pre-dates widespread RoHS conversion) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Logic Elements / Cells | β | 16,640 |
| System Gates | β | 400,000 (typical) |
| Maximum User I/O | β | 502 |
| Package | β | 672-pin FBGA (Fine-pitch BGA) |
| Logic Family / Process | β | CMOS |
| Speed Grade | β | -1 (slowest commercial bin) |
| MSL Level | β | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | β | JTAG / passive serial / passive parallel (per APEX-20KE handbook) |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, GTL+ (per APEX-20KE family datasheet) |