EP20K400FI784-2 vs EP20K400FC784-2 Comparison

Detailed side-by-side comparison of EP20K400FI784-2 by Altera and EP20K400FC784-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FI784-2 EP20K400FC784-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $82.40 $175.00
Device Family APEX 20K β€”
Typical Gates 400,000 β€”
Logic Elements (LEs) [DATA_NEEDED: logic elements count] β€”
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] β€”
Maximum User I/O Pins [DATA_NEEDED: user I/O count] 488 (784-BGA)
Dedicated Inputs 4 β€”
Nominal Core Supply Voltage (VCCINT) 2.5 V β€”
VCCINT Range 2.375 V to 2.625 V β€”
Speed Grade -2 -2 (industrial)
Operating Temperature Range -40 Β°C to +100 Β°C β€”
Package Type S-PBGA-B784 (FineLine BGA) β€”
Package Pin Count 784 balls β€”
Ball Pitch 1.000 mm β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: not confirmed in provided data]
Lead-Free [DATA_NEEDED: lead-free status] β€”
MSL Level [DATA_NEEDED: MSL rating] 3 (per Partstack listing)
Device Form Factor Loadable PLD β€”
Process Technology [DATA_NEEDED: process node] 0.22 Β΅m CMOS SRAM
Configuration Memory SRAM-based (volatile) β€”
Family β€” APEX 20K
Device Family Member β€” EP20K400C
Typical System Gates β€” 400,000
Logic Elements β€” 16,640
Embedded RAM (ESB) β€” 212 Kbits
Maximum Block RAM β€” [DATA_NEEDED: block RAM organization per ESB]
Maximum Frequency (internal) β€” [DATA_NEEDED: fmax, datasheet-dependent]
Core Voltage β€” 2.5 V
MultiVolt I/O Voltage β€” 1.8 V / 2.5 V / 3.3 V
Supported I/O Standards β€” LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT
Configuration Mode β€” Serial / Parallel SRAM-volatile (external PROM required)
Package β€” 784-Ball FineLine BGA (FC)
Operating Temperature β€” [DATA_NEEDED: exact Tj range]
Peak Reflow Temperature β€” 220 Β°C (per Partstack listing)
Hot Socketing β€” Supported
JTAG / Boundary-Scan β€” IEEE 1149.1 compliant

Datasheets & Resources

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