EP20K400GC655-1V vs EP20K400GC655-2N Comparison

Detailed side-by-side comparison of EP20K400GC655-1V by Altera and EP20K400GC655-2N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400GC655-1V EP20K400GC655-2N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $555.00 $127.50
Family APEX 20KE APEX 20KC
Logic Elements 16,640 β€”
Typical Gate Count 400,000 gates β€”
Embedded Memory 212,992 bits β€”
Maximum User I/O 496 β€”
Dedicated Inputs 6 β€”
Package CBGA-655 (Ceramic Ball Grid Array) β€”
Total Terminals 655 β€”
Supply Voltage (Core) 2.375 V to 2.625 V (nominal 2.5 V) β€”
Propagation Delay 2.5 ns β€”
Maximum Internal Frequency 250 MHz (-1V speed grade) β€”
Process Technology 0.22 Β΅m CMOS 0.22 Β΅m CMOS
LVDS Support Yes Yes
Moisture Sensitivity Level MSL 1 β€”
Peak Reflow Temperature 220 Β°C β€”
Qualification Not Qualified β€”
Programming Interface IEEE 1532 / JTAG β€”
Number of Logic Elements β€” 16640
Number of Logic Cells β€” 16640
Total System Gates β€” 400000
Total RAM Bits β€” 212992
Number of I/O β€” [DATA_NEEDED: I/O count]
Number of LABs/CLBs β€” [DATA_NEEDED: LAB count]
Core Voltage (VCCINT) β€” 1.71 V to 1.89 V
I/O Voltage (VCCIO) β€” 2.5 V (LVDS-capable)
Maximum Operating Frequency β€” 200 MHz
Propagation Delay (Tpd) β€” 3.1 ns
Package / Case β€” 655-BCPGA (Ceramic Pin Grid Array)
Supplier Device Package β€” 655-CPGA, 62.48 x 62.48 mm
Operating Temperature β€” Industrial (per Altera part-number -N suffix)
Mounting Type β€” Through-Hole (CPGA, socket-compatible)
Architecture β€” MultiCore (LUT + product-term + embedded memory)
Configuration Method β€” JTAG / Passive Serial
RoHS Status β€” [DATA_NEEDED: RoHS status]
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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