EP20K400GC655-2 vs EP20K400GI655-1 Comparison
Detailed side-by-side comparison of EP20K400GC655-2 by Altera and EP20K400GI655-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400GC655-2 | EP20K400GI655-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $80.00 | $195.00 |
| Series | APEX-20KC | β |
| Family | APEX 20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| System Gates | 400,000 | β |
| Logic Cells / Elements | 16,640 | β |
| Total RAM Bits | 212,992 | β |
| Maximum Internal Frequency | 200 MHz | β |
| Speed Grade | -2 | β |
| Process Technology | 0.22 Β΅m CMOS | β |
| Core Supply Voltage | 2.5 V | β |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | β |
| LVDS Support | Yes | β |
| PLLs | 4 | β |
| Pin Count | 655 | β |
| Package Type | 655-BCPGA (CPGA-655) | Ceramic Pin Grid Array (CPGA-655) |
| Package Dimensions | 62.48 x 62.48 mm | β |
| Mounting Type | Through-Hole (CPGA) | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Device Series | β | EP20K400 |
| Technology | β | CMOS, SRAM-based |
| Logic Elements | β | 16640 |
| Typical Gates | β | 400000 |
| Maximum User I/O | β | 502 |
| Dedicated Inputs | β | 4 |
| Total Terminals | β | 655 |
| Propagation Delay | β | 2.5 ns |
| JESD-30 Package Code | β | S-CPGA-P655 |
| Moisture Sensitivity Level | β | MSL 1 |
| Peak Reflow Temperature | β | 220 C |
| Programmability | β | In-system, JTAG boundary-scan (IEEE 1149.1) |
| Process Node | β | 0.18 micrometer CMOS |