EP20K400GI655-1X vs EP20K400GI655-2 Comparison

Detailed side-by-side comparison of EP20K400GI655-1X by Altera and EP20K400GI655-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400GI655-1X EP20K400GI655-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $160.00 $175.00
Family APEX 20K β€”
Device EP20K400 β€”
Logic Elements 16640 β€”
Number of Terminals 655 655
User I/O Lines 502 β€”
Dedicated Inputs 4 6
Package Type Ceramic Pin Grid Array (CPGA) β€”
Package Code (JESD-30) S-CPGA-P655 β€”
Package Equivalence Code SPGA655,47X47 β€”
Package Body Material CERAMIC (metal-sealed co-fired) β€”
Speed Grade -1 β€”
Propagation Delay 2.5 ns (typical for -1 grade) 3.1 ns (typical)
Process Technology CMOS, SRAM-based configuration β€”
Moisture Sensitivity Level (MSL) 1 β€”
Peak Reflow Temperature 220 C β€”
Operating Temperature -40 C to +85 C (industrial) -40C to +85C (industrial)
Mounting Type Through-Hole (PGA) Through-Hole / Socket
RoHS Status Compliant [DATA_NEEDED: RoHS status]
Manufacturer β€” Altera Corporation
Series β€” APEX 20K (EP20K400)
Device Type β€” Field Programmable Gate Array (FPGA)
Typical Gate Count β€” 400,000 gates
Logic Elements (LE) β€” 16,640
Maximum User I/O β€” 496
Package β€” SPGA-655 (47 mm x 47 mm)
Nominal Supply Voltage β€” 2.5 V
Supply Voltage Range β€” 2.375 V to 2.625 V
Technology β€” CMOS SRAM
Moisture Sensitivity Level β€” 1 (per Altera family)
Configuration Method β€” JTAG, Passive Serial, Passive Parallel
I/O Standards Supported β€” LVTTL, LVCMOS, PCI, GTL+
Embedded Memory β€” Embedded System Blocks (ESBs)
Lifecycle Status β€” Obsolete (legacy Altera APEX 20K family)

Datasheets & Resources

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