EP20K600CB652C9N vs EP20K600CB652I9N Comparison

Detailed side-by-side comparison of EP20K600CB652C9N by Intel and EP20K600CB652I9N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB652C9N EP20K600CB652I9N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $128.00 $158.00
Family APEX 20KC APEX 20KC
Device Type Loadable PLD (FPGA) β€”
Typical Gates 600,000 β€”
Logic Elements 24,320 24,320
Maximum User I/O 488 β€”
Package BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) 652-BGA (PBGA652)
Process Technology 0.15 micron all-layer copper CMOS 0.15 um CMOS
Core Supply Voltage 1.8 V β€”
Speed Grade C9 (~1.48 ns propagation delay) β€”
Architecture MultiCore LUT + embedded system memory (ESB) β€”
On-chip Memory Embedded system memory blocks (dual-port RAM, FIFO) β€”
Configuration Interface JTAG (IEEE 1149.1) and serial/PROM configuration β€”
Operating Temperature 0 C to 85 C (commercial) -40C to +100C (Industrial)
Mounting Type Surface Mount (BGA) β€”
Pin/Pin Compatibility Pin-compatible with APEX 20KE devices of same package β€”
Toolchain Altera/Intel Quartus II (legacy APEX support) β€”
RoHS Status [DATA_NEEDED: rohs status] β€”
MSL Level [DATA_NEEDED: MSL level] β€”
System Gates β€” 600,000
Maximum Operating Frequency β€” 250 MHz
Core Voltage β€” 1.8 V
I/O Voltage β€” 3.3 V
Total I/O Pins β€” 488
General-Purpose I/O β€” 480
Dedicated Inputs β€” 4
Terminal Pitch β€” 1.27 mm
Configuration Method β€” Passive Serial / Passive Parallel / JTAG
Embedded Memory β€” ESB (Embedded System Block) RAM / CAM
I/O Standards β€” LVDS, PCI, LVTTL, LVCMOS

Datasheets & Resources

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