EP20K600CB652I7 vs EP20K600CB652I7N Comparison
Detailed side-by-side comparison of EP20K600CB652I7 by Intel and EP20K600CB652I7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CB652I7 | EP20K600CB652I7N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $149.00 | $158.00 |
| Family | APEX 20KC | APEX 20KC |
| Manufacturer | Intel (formerly Altera) | β |
| Technology | 0.15 Β΅m CMOS, SRAM-based | β |
| System Gates | 600,000 | β |
| Logic Elements | 24,320 | β |
| Maximum Internal Frequency | 375.94 MHz | β |
| Propagation Delay | 1.6 ns | β |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V range) | β |
| User I/O Count | 488 (4 dedicated inputs + 480 I/O) | β |
| Number of Outputs | 480 | β |
| Package | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) | 652-pin FineLine BGA |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | -40 Β°C to +85 Β°C (industrial, 'I' suffix) | β |
| Speed Grade | -7 | 7 |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | β |
| Embedded Memory | ESBs configurable as dual-port RAM / ROM / CAM | β |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks | β |
| RoHS Status | unknown | unknown |
| Typical Gates | β | 600,000 |
| Logic Elements (Cells) | β | 24,320 |
| Maximum Operating Frequency | β | 375.94 MHz |
| Process Technology | β | 0.15 Β΅m CMOS |
| Core Supply Voltage (VCCINT) | β | 1.8 V |
| User I/O Banks | β | [DATA_NEEDED: User I/O Banks] |
| Maximum User I/O | β | [DATA_NEEDED: Maximum User I/O] |
| Embedded System Block (ESB) Memory | β | 311,040 bits |
| Phase-Locked Loops (PLLs) | β | 4 |
| Operating Temperature Grade | β | Industrial (-40C to +100C) |
| Configuration Method | β | SRAM-based, JTAG (IEEE 1149.1) |