EP20K600CF33C8 vs EP20K600CF33C8N Comparison
Detailed side-by-side comparison of EP20K600CF33C8 by Altera and EP20K600CF33C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF33C8 | EP20K600CF33C8N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $285.75 | $162.75 |
| Family | APEX 20KC | APEX 20KC |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| Typical Gates | 600,000 | β |
| Logic Elements | 24,320 | β |
| Embedded RAM Bits | 311,296 | β |
| Embedded System Blocks (ESB) | 152 | β |
| Maximum User I/O | 488 | β |
| Process Technology | 0.15 Β΅m CMOS | β |
| Core Voltage (VCCINT) | 1.8 V | β |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (bank-selectable) | β |
| LVDS Support | Yes, up to 840 Mbps | β |
| PLLs | 4 enhanced PLLs | β |
| Package | 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm | 1020-pin FC-FBGA (flip-chip) |
| Speed Grade | -8 | -8 (slower than -7) |
| Operating Temperature | Commercial (0 Β°C to +85 Β°C) | 0Β°C to 85Β°C (TJ) |
| Configuration Modes | Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG | β |
| RoHS Status | Compliant (lead-free version) / non-compliant for legacy C-speed grade variant | Compliant (N suffix) |
| Status | NRND / Last-Time-Buy (per Altera/Intel product notice) | β |
| Logic Elements / Cells | β | 24,320 |
| Total RAM Bits | β | 311,296 |
| Number of LABs / CLBs | β | 2,432 |
| Number of Gates | β | 1,537,000 (max) |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Core Voltage Supply | β | 1.71 V to 1.89 V (1.8 V nominal) |
| Technology / Process | β | 0.15 Β΅m CMOS |
| Maximum Internal Frequency | β | 301.21 MHz |
| Pitch | β | 0.33 mm |
| Mounting Type | β | Surface Mount |
| Programmable Type | β | In-System / SRAM-based |
| Configuration Interface | β | JTAG (IEEE 1149.1) + Passive Serial / Parallel |