EP20K600CF33C9N vs EP20K600CF33C9 Comparison

Detailed side-by-side comparison of EP20K600CF33C9N by Intel and EP20K600CF33C9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF33C9N EP20K600CF33C9
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $142.00 $171.00
Family APEX 20KC APEX 20KC
Logic Elements 24,320 β€”
Typical Gates 600,000 β€”
Maximum Operating Frequency 250 MHz 250 MHz
Process Technology 0.15 Β΅m CMOS 0.15 Β΅m CMOS
Core Supply Voltage 1.8 V β€”
Package FC-FBGA-1020 1020-ball FC-FBGA
Pin Count 1020 β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Configuration Interface JTAG (IEEE 1149.1), Passive Serial/Parallel β€”
Operating Temperature [DATA_NEEDED: operating temperature grade] β€”
I/O Standards LVTTL, LVCMOS, PCI, PECL β€”
Embedded Memory Embedded System Blocks (ESBs) β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Lead-Free [DATA_NEEDED: lead-free status] β€”
System Gates β€” 600,000 (maximum)
Logic Elements / Cells β€” 24,320
Maximum Clock Frequency β€” 303.03 MHz
Propagation Delay β€” 2.0 ns
Core Supply Voltage (VCCINT) β€” 1.8 V nominal (1.71 V to 1.89 V)
User I/O β€” 588 (4 dedicated inputs + 580 general-purpose I/O)
Operating Temperature Range β€” [DATA_NEEDED: operating temperature range]
Embedded RAM β€” Dual-port RAM blocks (per family)
Programmability β€” JTAG / IEEE 1149.1 ISP, SRAM-based
MSL Level β€” [DATA_NEEDED: MSL level]
Logic Block Architecture β€” MultiCore (LUT + product-term + embedded memory)
I/O Standards Supported β€” LVTTL, LVCMOS, LVDS (per family datasheet)

Datasheets & Resources

Browse All Products Create BOM Request Quote