EP20K600CF672C-7ES vs EP20K600CF672C7N Comparison

Detailed side-by-side comparison of EP20K600CF672C-7ES by Altera and EP20K600CF672C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672C-7ES EP20K600CF672C7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $2,050.00 $108.00
Family APEX 20KC β€”
Device Type Field Programmable Gate Array (FPGA) β€”
Maximum System Gates 1,560,000 (typical 600K application gates) 1,052,000
Typical Logic Elements 24,320 (per APEX 20KC 600K family) β€”
Maximum User I/O 488 β€”
Total I/O Lines 504 (per Microchip USA listing) β€”
Total Inputs 508 β€”
Embedded System Blocks (ESBs) 248 β€”
Embedded RAM 248 Kbits (dual-port) β€”
PLLs 4 β€”
Propagation Delay 1.48 ns to 1.6 ns 1.48 ns
Maximum Clock Frequency 1666.6 MHz β€”
Speed Grade -7 C7
Process Technology 0.15 micron all-layer copper CMOS 0.15 Β΅m all-layer copper-metal CMOS
Package 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch
Operating Temperature 0 C to 85 C (Commercial) 0 Β°C to +85 Β°C (Commercial)
Core Voltage 1.8 V (typical APEX 20KC, exact value per datasheet) 1.8 V
Configuration Mode EPC serial / JTAG IEEE 1149.1 β€”
Compliance RoHS status unknown (verify with manufacturer datasheet) β€”
Device Family β€” APEX 20KC
Typical Gates β€” 600,000
Logic Elements / Cells β€” 24,320
Maximum User I/O Pins β€” 488
Total Package Pins β€” 652
Maximum Operating Frequency β€” 375.94 MHz
Architecture β€” MultiCore (LUT + Embedded System Memory)
Seated Height β€” 3.50 mm
Mounting Type β€” Surface Mount (BGA)
RoHS Status β€” unknown

Datasheets & Resources

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