EP20K600CF672C7N vs EP20K600CF672C-7ES Comparison

Detailed side-by-side comparison of EP20K600CF672C7N by Altera and EP20K600CF672C-7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672C7N EP20K600CF672C-7ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $108.00 $2,050.00
Device Family APEX 20KC β€”
Maximum System Gates 1,052,000 1,560,000 (typical 600K application gates)
Typical Gates 600,000 β€”
Logic Elements / Cells 24,320 β€”
Maximum User I/O Pins 488 β€”
Total Package Pins 652 β€”
Package FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch
Core Voltage 1.8 V 1.8 V (typical APEX 20KC, exact value per datasheet)
Maximum Operating Frequency 375.94 MHz β€”
Propagation Delay 1.48 ns 1.48 ns to 1.6 ns
Process Technology 0.15 Β΅m all-layer copper-metal CMOS 0.15 micron all-layer copper CMOS
Architecture MultiCore (LUT + Embedded System Memory) β€”
Operating Temperature 0 Β°C to +85 Β°C (Commercial) 0 C to 85 C (Commercial)
Speed Grade C7 -7
Seated Height 3.50 mm β€”
Mounting Type Surface Mount (BGA) β€”
RoHS Status unknown β€”
Family β€” APEX 20KC
Device Type β€” Field Programmable Gate Array (FPGA)
Typical Logic Elements β€” 24,320 (per APEX 20KC 600K family)
Maximum User I/O β€” 488
Total I/O Lines β€” 504 (per Microchip USA listing)
Total Inputs β€” 508
Embedded System Blocks (ESBs) β€” 248
Embedded RAM β€” 248 Kbits (dual-port)
PLLs β€” 4
Maximum Clock Frequency β€” 1666.6 MHz
Configuration Mode β€” EPC serial / JTAG IEEE 1149.1
Compliance β€” RoHS status unknown (verify with manufacturer datasheet)

Datasheets & Resources

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