EP20K600CF672C7N vs EP20K600CF672C7ES Comparison

Detailed side-by-side comparison of EP20K600CF672C7N by Altera and EP20K600CF672C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K600CF672C7ES EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES ⚠ Last Time Buy

Specification Comparison

Parameter EP20K600CF672C7N EP20K600CF672C7ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $108.00 $360.00
Device Family APEX 20KC β€”
Maximum System Gates 1,052,000 β€”
Typical Gates 600,000 β€”
Logic Elements / Cells 24,320 24320
Maximum User I/O Pins 488 β€”
Total Package Pins 652 β€”
Package FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch β€”
Core Voltage 1.8 V β€”
Maximum Operating Frequency 375.94 MHz 375.94 MHz (per FPGAkey listing)
Propagation Delay 1.48 ns 1.6 ns
Process Technology 0.15 Β΅m all-layer copper-metal CMOS 0.15 Β΅m CMOS
Architecture MultiCore (LUT + Embedded System Memory) β€”
Operating Temperature 0 Β°C to +85 Β°C (Commercial) [DATA_NEEDED: operating temperature grade]
Speed Grade C7 β€”
Seated Height 3.50 mm β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
RoHS Status unknown [DATA_NEEDED: RoHS compliance]
Series β€” APEX 20KC
Family β€” APEX 20K
System Gates β€” 600000
Maximum User I/O β€” 504
Maximum Input Lines β€” 508
Number of Macrocells β€” 504
Internal Reference Clock β€” 1666.6 MHz
Core Supply Voltage (VCCINT) β€” 1.8 V
Package Type β€” FC-FBGA
Pin / Ball Count β€” 672
Grade Suffix β€” ES (engineering sample / extended screening)
MSL Level β€” [DATA_NEEDED: MSL rating]
Configuration Memory β€” SRAM-based (volatile)

Datasheets & Resources

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