EP20K600CF672C7N vs EP20K600CF672I7N Comparison

Detailed side-by-side comparison of EP20K600CF672C7N by Altera and EP20K600CF672I7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672C7N EP20K600CF672I7N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $108.00 $232.00
Device Family APEX 20KC β€”
Maximum System Gates 1,052,000 600,000
Typical Gates 600,000 β€”
Logic Elements / Cells 24,320 β€”
Maximum User I/O Pins 488 508
Total Package Pins 652 β€”
Package FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch 672-ball FineLine BGA (FC-FBGA)
Core Voltage 1.8 V β€”
Maximum Operating Frequency 375.94 MHz β€”
Propagation Delay 1.48 ns β€”
Process Technology 0.15 Β΅m all-layer copper-metal CMOS β€”
Architecture MultiCore (LUT + Embedded System Memory) β€”
Operating Temperature 0 Β°C to +85 Β°C (Commercial) β€”
Speed Grade C7 I7 (-40 Β°C to +100 Β°C industrial)
Seated Height 3.50 mm β€”
Mounting Type Surface Mount (BGA) β€”
RoHS Status unknown [DATA_NEEDED: RoHS compliance]
Family β€” APEX 20KC
Technology β€” 0.15 Β΅m CMOS
Logic Elements β€” 24,320
Maximum Internal Frequency β€” 376 MHz
Embedded System Blocks (ESBs) β€” 160
Total Embedded RAM (max) β€” 311,296 bits
Core Voltage (VCCINT) β€” 1.8 V
I/O Voltage (VCCIO) β€” 2.5 V / 3.3 V (MultiVolt, bank-dependent)
Ball Pitch β€” 1.0 mm
Package Body Size β€” 27 mm Γ— 27 mm
Propagation Delay (typical) β€” 1.6 ns
Configuration Method β€” JTAG (IEEE 1149.1) + EPC configuration device
Lead-Free Finish (N suffix) β€” Yes

Datasheets & Resources

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