EP20K600CF672C8N vs EP20K600CF672I-8ES Comparison
Detailed side-by-side comparison of EP20K600CF672C8N by Intel and EP20K600CF672I-8ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K600CF672I-8ES - APEX 20KC 600K-Gate FPGA, 672-BGA | Intel / Altera
EP20K600CF672I-8ES ObsoleteSpecification Comparison
| Parameter | EP20K600CF672C8N | EP20K600CF672I-8ES |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $108.00 | $119.00 |
| Device Type | SPLD | β |
| Product Type | FPGA / programmable logic device | β |
| Family | APEX 20KC | APEX 20KC |
| Nominal Gate Capacity | 600K gates | β |
| Logic Elements or Cells | 24,320 | β |
| Macros | 2,432 | β |
| User I/O Count | 508 | β |
| Package Terminals | 652 pins | β |
| Package | BGA-652, 45 x 45 mm, 1.27 mm pitch | 672-ball BGA (FineLine BGA, 1.27 mm pitch) |
| Package Description | 672-pin FC-FBGA | β |
| Supply Voltage | 1.8 V | β |
| Listed Frequency | 301.21 MHz | β |
| Propagation Delay | 1.48 ns | β |
| Fabrication Process | 0.15 Β΅m | β |
| Operating Temperature | 0Β°C to 85Β°C | -40C to +100C (Industrial) |
| Interconnect Metal | All-layer copper metal | β |
| I/O Configuration | 508 user I/O | β |
| Mounting Type | Surface mount | β |
| RoHS Status | unknown | Non-compliant (legacy Altera leaded BGA process) |
| REACH Status | unknown | β |
| AEC-Q100 Qualification | unknown | β |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | β |
| Core Current | [DATA_NEEDED: core supply current] | β |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | β |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | β |
| Thermal Resistance | [DATA_NEEDED: junction-to-ambient thermal resistance] | β |
| Logic Elements | β | 24,320 |
| Typical Gates | β | 600,000 (ASIC-equivalent) |
| Embedded Memory Bits | β | 311,296 |
| Maximum User I/O Pins | β | 508 |
| Embedded PLLs | β | 4 |
| Core Voltage | β | 1.8 V |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ |
| Process Technology | β | 0.18 micron CMOS SRAM |
| Speed Grade | β | -8 (slower) |
| Configuration Modes | β | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG |
| In-System Programmability | β | Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) |
| MSL Level | β | [DATA_NEEDED: moisture sensitivity level] |