EP20K600CF672I-8ES vs EP20K600CF672C8 Comparison
Detailed side-by-side comparison of EP20K600CF672I-8ES by Altera and EP20K600CF672C8 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K600CF672I-8ES - APEX 20KC 600K-Gate FPGA, 672-BGA | Intel / Altera
EP20K600CF672I-8ES Obsolete
Specification Comparison
| Parameter | EP20K600CF672I-8ES | EP20K600CF672C8 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Unknown |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $119.00 | $322.41 |
| Family | APEX 20KC | β |
| Logic Elements | 24,320 | 24,320 |
| Typical Gates | 600,000 (ASIC-equivalent) | β |
| Embedded Memory Bits | 311,296 | β |
| Maximum User I/O Pins | 508 | β |
| Embedded PLLs | 4 | β |
| Core Voltage | 1.8 V | β |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | β |
| Process Technology | 0.18 micron CMOS SRAM | β |
| Speed Grade | -8 (slower) | β |
| Operating Temperature | -40C to +100C (Industrial) | 0 C to 85 C |
| Package | 672-ball BGA (FineLine BGA, 1.27 mm pitch) | β |
| Configuration Modes | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG | β |
| In-System Programmability | Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) | β |
| RoHS Status | Non-compliant (legacy Altera leaded BGA process) | Non-compliant |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | β |
| Device Type | β | Field Programmable Gate Array (FPGA) |
| Product Family | β | APEX-20K |
| User I/O Count | β | 508 |
| Total RAM Bits | β | 311,296 bits |
| Propagation Delay | β | 1.48 ns |
| Package Pin Count | β | 672 balls |
| Supplier Device Package | β | 672-FBGA, 27 mm x 27 mm |
| Alternate Package Description | β | BGA-652, 45 mm x 45 mm, 1.27 mm pitch |
| Package Type | β | FBGA |
| Mounting Type | β | Surface Mount |
| Supply Voltage | β | 1.71 V to 1.89 V |
| Fabrication Process | β | 0.15 um |
| Lead-Free Status | β | [DATA_NEEDED: lead-free status] |
| Configuration Interface | β | [DATA_NEEDED: configuration interface] |
| Maximum Core Frequency | β | [DATA_NEEDED: maximum core frequency] |