EP20K600CF672I7N vs EP20K400CF672I7N Comparison
Detailed side-by-side comparison of EP20K600CF672I7N by Intel and EP20K400CF672I7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672I7N | EP20K400CF672I7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $232.00 | $620.00 |
| Family | APEX 20KC | APEX 20KC |
| Technology | 0.15 Β΅m CMOS | β |
| Maximum System Gates | 600,000 | β |
| Logic Elements | 24,320 | β |
| Maximum User I/O Pins | 508 | β |
| Maximum Internal Frequency | 376 MHz | β |
| Embedded System Blocks (ESBs) | 160 | β |
| Total Embedded RAM (max) | 311,296 bits | β |
| Core Voltage (VCCINT) | 1.8 V | β |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | β |
| Package | 672-ball FineLine BGA (FC-FBGA) | 672-ball FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Ball Pitch | 1.0 mm | β |
| Package Body Size | 27 mm Γ 27 mm | β |
| Speed Grade | I7 (-40 Β°C to +100 Β°C industrial) | β |
| Propagation Delay (typical) | 1.6 ns | β |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | β |
| Lead-Free Finish (N suffix) | Yes | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Number of Logic Elements / Cells | β | 16640 |
| Number of LABs/CLBs | β | 502 |
| Total RAM Bits | β | 212992 |
| System Gates | β | 400000 |
| Maximum Operating Frequency | β | 375.94 MHz |
| Process Technology | β | 0.15 Β΅m CMOS |
| Core Supply Voltage (VCCINT) | β | 1.8 V |
| I/O Supply Voltage (VCCIO) | β | 1.8 V / 3.3 V |
| Mounting Type | β | Surface Mount |
| Moisture Sensitivity Level (MSL) | β | 3 |
| Terminal Finish | β | Tin/Lead (Sn/Pb) |
| JESD-609 Code | β | e0 |
| Operating Temperature (industrial, I7) | β | -40C to +100C |