EP20K600CF672I7N vs EP20K600CF672I6 Comparison
Detailed side-by-side comparison of EP20K600CF672I7N by Intel and EP20K600CF672I6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672I7N | EP20K600CF672I6 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $232.00 | $142.00 |
| Family | APEX 20KC | APEX 20KC |
| Technology | 0.15 Β΅m CMOS | β |
| Maximum System Gates | 600,000 | β |
| Logic Elements | 24,320 | 24,320 |
| Maximum User I/O Pins | 508 | 508 |
| Maximum Internal Frequency | 376 MHz | β |
| Embedded System Blocks (ESBs) | 160 | β |
| Total Embedded RAM (max) | 311,296 bits | β |
| Core Voltage (VCCINT) | 1.8 V | β |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | β |
| Package | 672-ball FineLine BGA (FC-FBGA) | 672-BGA FineLine BGA |
| Ball Pitch | 1.0 mm | β |
| Package Body Size | 27 mm Γ 27 mm | β |
| Speed Grade | I7 (-40 Β°C to +100 Β°C industrial) | CF |
| Propagation Delay (typical) | 1.6 ns | β |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | SRAM (volatile) |
| Lead-Free Finish (N suffix) | Yes | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Device | β | EP20K600 |
| Typical Gates | β | 600,000 |
| Embedded Memory Bits | β | 311,296 |
| Number of PLLs | β | 4 |
| Temperature Grade | β | Industrial (I) |
| Operating Temperature | β | -40C to +85C |
| Process Technology | β | 0.18 micron CMOS |
| Mounting Type | β | Surface Mount (BGA) |