EP20K600EFC144-2XN vs EP20K600CB652C8N Comparison

Detailed side-by-side comparison of EP20K600EFC144-2XN by Altera and EP20K600CB652C8N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600EFC144-2XN EP20K600CB652C8N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $115.00 $115.00
Family APEX 20KE APEX 20KC
Logic Elements 24,576 24,320 cells
Typical Gates 600,000 β€”
Maximum System Gates 1,053,840 β€”
Embedded RAM Bits 311,040 bits (~38 KB) β€”
Number of ESBs (Embedded System Blocks) [DATA_NEEDED: ESB count] β€”
Number of Multiplier Blocks [DATA_NEEDED: multiplier count] β€”
Number of PLLs 4 β€”
Number of I/O Pins [DATA_NEEDED: usable I/O count] β€”
Core Voltage 1.8 V β€”
I/O Voltage Banks Multi-voltage (LVTTL/LVCMOS/PCI) β€”
Process Technology 0.18 um CMOS, 6-layer metal 0.18 Β΅m all-layer copper-metal
Speed Grade -2 (mid-tier) C8
Package 144-ball FineLine BGA 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch
Operating Temperature -40C to +85C (industrial, 'N' suffix) 0 Β°C to 85 Β°C (commercial)
RoHS Status [DATA_NEEDED: RoHS] unknown
Configuration Method SRAM, IEEE 1532 / passive serial / passive parallel β€”
Device Type β€” Loadable PLD / FPGA
System Gates β€” 600,000
Embedded Memory β€” 311,296 bits
User I/O Pins β€” 488
Dedicated Inputs β€” 4
Outputs β€” 480
Propagation Delay (typ.) β€” 1.48 ns
Pin-to-Pin Timing β€” 1.78 ns
Internal Frequency (typ.) β€” 301.21 MHz
Core Supply Voltage β€” 1.8 V nominal (1.71 V to 1.89 V)
Mounting Type β€” Surface Mount (BGA)
Architecture β€” MultiCore LUT + Embedded System Blocks (ESB)
Pin-Compatible With β€” APEX 20KE family

Datasheets & Resources

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