EP20K60EFC144-1 vs EP20K30EFC144-2X Comparison

Detailed side-by-side comparison of EP20K60EFC144-1 by Altera and EP20K30EFC144-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K60EFC144-1

EP20K60EFC144-1 - APEX 20KE FPGA 60K Gates 144-FBGA | Altera

EP20K60EFC144-1 Obsolete
Altera
EP20K30EFC144-2X

EP20K30EFC144-2X - 30K Gate APEX 20K FPGA | Altera

EP20K30EFC144-2X Obsolete

Specification Comparison

Parameter EP20K60EFC144-1 EP20K30EFC144-2X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.40 $58.50
Device Family APEX 20KE Altera APEX 20K
Series APEX 20K β€”
Logic Family CMOS β€”
Typical Gates 60,000 30,000 gates
Maximum System Gates 256,000 β€”
Macrocells 256 β€”
Maximum User I/Os 93 (per datasheet; 196 max in 144-FBGA family datasheet) β€”
Embedded Memory 32,768 bits (2560 RAM blocks) β€”
Maximum Internal Frequency 160 MHz β€”
Propagation Delay 1.72 ns β€”
Core Supply Voltage 1.8 V 1.8 V
Speed Grade -1 -2X
Operating Temperature 0 C to 85 C (Commercial) β€”
Package 144-FBGA (Fine-pitch BGA) β€”
Package Pin Count 144 balls β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: rohs_status] unknown
Programming Interface JTAG / ByteBlaster / Altera Programming Unit β€”
Device Type β€” Loadable programmable logic device (FPGA/CPLD hybrid)
Number of Logic Elements / Cells β€” 1,200 cells (third-party parametric listing)
Number of Macrocells β€” 192
Number of User I/O β€” 93
Number of Terminals β€” 144
Terminal Form β€” Ball
Package Code β€” LBGA / 144-FBGA
Package Shape β€” Square
Process Technology β€” 0.22 um
Operating Temperature Range β€” [DATA_NEEDED: exact operating temperature range]
Embedded RAM Bits β€” [DATA_NEEDED: embedded memory size]
Supported I/O Standards β€” [DATA_NEEDED: supported I/O standards]
Configuration Schemes β€” [DATA_NEEDED: supported configuration schemes]

Datasheets & Resources

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