EP2A25F672C9 vs EP2A25F672C9N Comparison
Detailed side-by-side comparison of EP2A25F672C9 by Altera and EP2A25F672C9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A25F672C9 | EP2A25F672C9N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $700.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements (LE) | Approximately 25,000 | β |
| Macro Cells | 2432 | β |
| User I/O | 492 | β |
| Package | 672-ball FCBGA (FineLine BGA) | 672-ball FineLine BGA (F672), 27 Γ 27 mm, 1.00 mm pitch |
| Package Dimensions | 27 mm x 27 mm | β |
| Ball Pitch | 1.0 mm | β |
| Process Technology | 0.15 Β΅m all-layer copper, up to 8 metal layers | 0.15 Β΅m all-layer copper, up to 8 metal layers |
| Logic Family | CMOS | CMOS |
| Propagation Delay | 1.69 ns | 2.23 ns |
| Operating Temperature | 0Β°C to 85Β°C (Commercial) | 0 Β°C to +85 Β°C (commercial, C9 grade) |
| Supply Voltage | [DATA_NEEDED: core VCC voltage] | β |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) | β |
| Configuration | Passive Serial, Passive Parallel Synchronous, JTAG | β |
| Embedded Memory | ESBs for dual-port RAM, ROM, FIFO | Enhanced System Blocks (ESBs) for dual-port RAM |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | [DATA_NEEDED] | Compliant (per distributor listings) |
| Logic Elements / Cells | β | 24320 |
| System Gates | β | Approx. 900000 |
| Maximum User I/O | β | 492 |
| Operating Frequency | β | 236 MHz |
| Core Supply Voltage (VCCINT) | β | 1.425 V to 1.575 V (nominal 1.5 V) |
| Seated Height (max) | β | 2.100 mm |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport |
| LVDS Data Rate | β | Up to 1 Gbps (True-LVDS) |
| Configuration Interface | β | Serial / Parallel PROM, JTAG, passive parallel (enhanced) |
| Design Software | β | Quartus II (v5.1 or later) |