EP2A25F672I-7 vs EP2A25F672C8N Comparison
Detailed side-by-side comparison of EP2A25F672I-7 by Intel and EP2A25F672C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A25F672C8N
EP2A25F672C8N - APEX II 900K Gates 333MHz FPGA | Altera/Intel
EP2A25F672C8N NrndSpecification Comparison
| Parameter | EP2A25F672I-7 | EP2A25F672C8N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $205.00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | β |
| Device Type | FPGA (Field-Programmable Gate Array) | β |
| System Gates | 900K (approximately) | 900,000 |
| Logic Cells / Elements | 24,320 | β |
| Maximum Operating Frequency | 500 MHz | β |
| Process Technology | 0.15 um | β |
| Core Voltage | 1.5 V | β |
| Package | 672-pin FC-FBGA | 672-ball FC-FBGA (FineLine BGA) |
| Mounting Type | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Speed Grade | -7 | C8 |
| Operating Temperature | -40C to +85C (Industrial) | 0 C to 85 C (commercial) |
| Temperature Grade | Industrial (I) | β |
| Configuration Method | JTAG, Passive Serial, Active Serial | β |
| JTAG Support | IEEE 1149.1 Boundary Scan | β |
| RoHS Status | [DATA_NEEDED: rohs status] | Compliant |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Embedded Memory | ESBs (Embedded System Blocks) | β |
| Technology Node | β | 0.15 um all-layer copper process |
| Logic Elements / Cells | β | 24,320 |
| Maximum Internal Frequency | β | 333 MHz |
| Propagation Delay | β | 1.69 ns |
| User I/Os | β | 492 |
| Package Body Size | β | 27 x 27 mm |
| Ball Pitch | β | 1.0 mm |
| Core Supply Voltage | β | 1.5 V |
| Multi-Gigabit Transceiver Rate | β | Up to 1 Gbps per channel |
| Lead-Free Suffix | β | N (lead-free, Pb-free finish) |