EP2A25F672I-7 vs EP2A25F672C9 Comparison
Detailed side-by-side comparison of EP2A25F672I-7 by Intel and EP2A25F672C9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A25F672I-7 | EP2A25F672C9 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $700.00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | β |
| Device Type | FPGA (Field-Programmable Gate Array) | β |
| System Gates | 900K (approximately) | β |
| Logic Cells / Elements | 24,320 | β |
| Maximum Operating Frequency | 500 MHz | β |
| Process Technology | 0.15 um | 0.15 Β΅m all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | β |
| Package | 672-pin FC-FBGA | 672-ball FCBGA (FineLine BGA) |
| Mounting Type | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Speed Grade | -7 | β |
| Operating Temperature | -40C to +85C (Industrial) | 0Β°C to 85Β°C (Commercial) |
| Temperature Grade | Industrial (I) | β |
| Configuration Method | JTAG, Passive Serial, Active Serial | β |
| JTAG Support | IEEE 1149.1 Boundary Scan | β |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED] |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Embedded Memory | ESBs (Embedded System Blocks) | ESBs for dual-port RAM, ROM, FIFO |
| Logic Elements (LE) | β | Approximately 25,000 |
| Macro Cells | β | 2432 |
| User I/O | β | 492 |
| Package Dimensions | β | 27 mm x 27 mm |
| Ball Pitch | β | 1.0 mm |
| Logic Family | β | CMOS |
| Propagation Delay | β | 1.69 ns |
| Supply Voltage | β | [DATA_NEEDED: core VCC voltage] |
| I/O Standards | β | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) |
| Configuration | β | Passive Serial, Passive Parallel Synchronous, JTAG |