EP2A25F672I-7 vs EP2A25F672C9N Comparison
Detailed side-by-side comparison of EP2A25F672I-7 by Intel and EP2A25F672C9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A25F672C9N
EP2A25F672C9N - 900K Gates APEX II FPGA, 672-BGA | Intel (Altera)
EP2A25F672C9N ObsoleteSpecification Comparison
| Parameter | EP2A25F672I-7 | EP2A25F672C9N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $195.00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | β |
| Device Type | FPGA (Field-Programmable Gate Array) | β |
| System Gates | 900K (approximately) | Approx. 900000 |
| Logic Cells / Elements | 24,320 | β |
| Maximum Operating Frequency | 500 MHz | β |
| Process Technology | 0.15 um | 0.15 Β΅m all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | β |
| Package | 672-pin FC-FBGA | 672-ball FineLine BGA (F672), 27 Γ 27 mm, 1.00 mm pitch |
| Mounting Type | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| Speed Grade | -7 | β |
| Operating Temperature | -40C to +85C (Industrial) | 0 Β°C to +85 Β°C (commercial, C9 grade) |
| Temperature Grade | Industrial (I) | β |
| Configuration Method | JTAG, Passive Serial, Active Serial | β |
| JTAG Support | IEEE 1149.1 Boundary Scan | β |
| RoHS Status | [DATA_NEEDED: rohs status] | Compliant (per distributor listings) |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Embedded Memory | ESBs (Embedded System Blocks) | Enhanced System Blocks (ESBs) for dual-port RAM |
| Logic Elements / Cells | β | 24320 |
| Maximum User I/O | β | 492 |
| Operating Frequency | β | 236 MHz |
| Core Supply Voltage (VCCINT) | β | 1.425 V to 1.575 V (nominal 1.5 V) |
| Seated Height (max) | β | 2.100 mm |
| Propagation Delay | β | 2.23 ns |
| Logic Family | β | CMOS |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport |
| LVDS Data Rate | β | Up to 1 Gbps (True-LVDS) |
| Configuration Interface | β | Serial / Parallel PROM, JTAG, passive parallel (enhanced) |
| Design Software | β | Quartus II (v5.1 or later) |