EP2A25F672I9 vs EP2A25F672C9N Comparison
Detailed side-by-side comparison of EP2A25F672I9 by Intel and EP2A25F672C9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A25F672I9 | EP2A25F672C9N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $135.00 | $195.00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements (LEs) | 24,320 | β |
| System Gates (typical) | 900,000 | β |
| Maximum Operating Frequency | 236 MHz | β |
| Process Technology | 0.15 Β΅m CMOS | 0.15 Β΅m all-layer copper, up to 8 metal layers |
| Core Voltage (VCCINT) | 1.5 V | β |
| Package | 672-pin FC-FBGA | 672-ball FineLine BGA (F672), 27 Γ 27 mm, 1.00 mm pitch |
| Pin Count | 672 | β |
| Temperature Grade | Industrial (-40 Β°C to +100 Β°C) | β |
| Speed Grade | 9 (fastest APEX II grade) | β |
| Embedded System Blocks (ESBs) | Yes (dual-port RAM/ROM) | β |
| Maximum User I/O | [DATA_NEEDED: max user I/O pin count] | 492 |
| Maximum Memory Bits | 422,400 bits | β |
| PLLs | 4 | β |
| Mounting Type | Surface Mount (flip-chip BGA) | Surface Mount (BGA) |
| Peak Reflow Temperature | 220 Β°C (per distributor listing) | β |
| Moisture Sensitivity Level (MSL) | 3 | β |
| RoHS Status | Unknown (legacy 2000s part; verify lot certificate) | Compliant (per distributor listings) |
| Logic Elements / Cells | β | 24320 |
| System Gates | β | Approx. 900000 |
| Operating Frequency | β | 236 MHz |
| Core Supply Voltage (VCCINT) | β | 1.425 V to 1.575 V (nominal 1.5 V) |
| Seated Height (max) | β | 2.100 mm |
| Propagation Delay | β | 2.23 ns |
| Logic Family | β | CMOS |
| Operating Temperature | β | 0 Β°C to +85 Β°C (commercial, C9 grade) |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport |
| LVDS Data Rate | β | Up to 1 Gbps (True-LVDS) |
| Configuration Interface | β | Serial / Parallel PROM, JTAG, passive parallel (enhanced) |
| Embedded Memory | β | Enhanced System Blocks (ESBs) for dual-port RAM |
| Design Software | β | Quartus II (v5.1 or later) |