EP2A40F1020C6 vs EP2A40F1020C9ES Comparison
Detailed side-by-side comparison of EP2A40F1020C6 by Intel and EP2A40F1020C9ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2A40F1020C9ES - APEX II FPGA 1.5M Gates 38400 Cells 366MHz | Altera
EP2A40F1020C9ES ObsoleteSpecification Comparison
| Parameter | EP2A40F1020C6 | EP2A40F1020C9ES |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $149.00 | $98.00 |
| Family | APEX II | APEX II |
| Maximum System Gates | 1,600,000 | β |
| Typical Gates | 40,000 | β |
| Logic Elements | [DATA_NEEDED: exact LE count] | β |
| Embedded System Bits | 655,360 bits | β |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | β |
| Number of PLLs | 4 | β |
| Core Supply Voltage | 1.8 V | 1.5 V |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | β |
| Package | FBGA-1020 | 1020-pin FC-FBGA |
| Process Technology | 0.15 Β΅m CMOS | 0.15 Β΅m CMOS |
| Configuration Interface | Passive Serial, Passive Parallel, Passive Asynchronous, JTAG (IEEE 1149.1) | β |
| In-System Programmability | Yes | β |
| Operating Temperature Grade | Commercial (0C to +85C) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| System Gates | β | 1.5 M |
| Logic Cells / Elements | β | 38,400 |
| Maximum Internal Clock Frequency | β | 366 MHz |
| Package Type | β | Flip-Chip Fine-Pitch Ball Grid Array |
| Mounting Type | β | Surface Mount |
| Embedded Memory | β | Embedded System Blocks (ESBs) - RAM/ROM |
| I/O Standards | β | LVDS and other high-speed standards (per family datasheet) |
| RAM Support | β | Synchronous and asynchronous |
| Operating Temperature | β | [DATA_NEEDED: operating temperature grade] |