EP2A40F1020C7N vs EP2A40F1020I9N Comparison
Detailed side-by-side comparison of EP2A40F1020C7N by Intel and EP2A40F1020I9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A40F1020C7N - APEX II 1.5M Gates FPGA, 735 I/O, FC-FBGA-1020 | Intel
EP2A40F1020C7N ObsoleteSpecification Comparison
| Parameter | EP2A40F1020C7N | EP2A40F1020I9N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $198.00 | $165.00 |
| Family | APEX II | APEX II |
| Technology | 0.15 Β΅m all-layer copper CMOS, up to 8 metal layers | β |
| System Gates | 1,500,000 (1.5 M) | 1,500,000 (1.5 M) |
| Logic Elements | 38,400 | β |
| Embedded Memory | ESB-based, 504 Kbits total | ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits]) |
| Maximum Internal Performance | 562 MHz | β |
| Propagation Delay | 1.55 ns | β |
| User I/O Pins | 735 | β |
| PLLs | 4 | β |
| Clock Networks | 12 | β |
| True-LVDS Data Rate | 1 Gbps | β |
| Supported I/O Standards | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL | β |
| Core Supply Voltage | 1.5 V nominal (1.425 V β 1.575 V) | 1.5 V |
| Logic Family | CMOS | β |
| Package | FC-FBGA-1020, 33 Γ 33 mm, 1.0 mm pitch, fine-line | 1020-pin FC-FBGA (Flip-Chip FineLine BGA) |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial, C7 grade) | β |
| Terminal Form | BGA ball (flip-chip) | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Device Logic Elements / Cells | β | 38,400 cells |
| Maximum Operating Frequency | β | 366 MHz |
| Process Technology | β | 0.15 um CMOS, up to 8 metal layers |
| User I/O Count | β | 735 bidirectional I/O |
| Operating Temperature Grade | β | Industrial (I9 suffix: -40C to +100C per Altera APEX II convention) |
| High-Speed I/O Standards | β | True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport |
| Clock Management | β | PLLs (count [DATA_NEEDED: PLL count]) |
| Configuration Modes | β | Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |
| Lifecycle Status | β | Obsolete (per distributor listings / Altera APEX II family EOL) |