EP2A40F672C8 vs EP2A40F672C8N Comparison

Detailed side-by-side comparison of EP2A40F672C8 by Intel and EP2A40F672C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40F672C8 EP2A40F672C8N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $68.00 $122.00
Family APEX II APEX II
Logic Family CMOS CMOS
Typical Logic Elements (LEs) 40,000 β€”
Embedded Memory Up to 1.5 Mbits β€”
User I/Os 492 pins 492
Number of Pins 672 β€”
Package Type FineLine BGA, 27 x 27 mm, 1.0 mm pitch FC-FBGA (FineLine BGA)
Process Technology 0.15-micron all-layer copper, up to 8 metal layers β€”
Propagation Delay (speed grade C8) 1.55 ns β€”
Operating Temperature 0 C to 85 C (commercial) β€”
Phase-Locked Loops (PLLs) 4 β€”
LVDS Signaling Support Up to 1 Gbps β€”
Multipliers Embedded multiplier blocks β€”
I/O Standards LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS β€”
Mounting Type Surface Mount (BGA) β€”
Series β€” EP2A40
System Gates β€” 1.5 M
Logic Elements / Cells β€” 38,400
Maximum Operating Frequency β€” 376 MHz
Propagation Delay β€” 1.55 ns
Technology Node β€” 0.15 Β΅m
Process Feature β€” All-layer copper, up to 8 metal layers
Nominal Supply Voltage (VCCINT) β€” 1.5 V
Supply Voltage Range β€” 1.425 V to 1.575 V
Number of Pins / Balls β€” 672
Package Dimensions β€” 27 x 27 mm
Ball Pitch β€” 1.0 mm
LVDS Data Rate β€” 1 Gbps
Embedded PLLs β€” 4
Programming Interface β€” JTAG (IEEE 1149.1)
Operating Temperature (Commercial) β€” 0 Β°C to 85 Β°C
Speed Grade β€” C8
RoHS Status β€” [DATA_NEEDED: RoHS status]

Datasheets & Resources

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