EP2A40F672C9ES vs EP2A40F672C7 Comparison
Detailed side-by-side comparison of EP2A40F672C9ES by Altera and EP2A40F672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40F672C9ES | EP2A40F672C7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | 38,400 |
| System Gates | 1,500,000 | 1,500,000 |
| Maximum User I/O | 492 | 492 |
| Operating Frequency (max) | 366 MHz | β |
| Process Technology | 0.15 Β΅m CMOS | 0.15 Β΅m CMOS, all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | 1.5 V |
| Package | 672-pin FC-FBGA | 672-ball FC-FBGA (FineLine BGA) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Speed Grade | -9 | β |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | β |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | β |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | β |
| Boundary Scan | IEEE 1149.1 (JTAG) | β |
| RoHS Status | unknown | Compliant |
| Macro Cells | β | 2,560 |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Pin-to-Pin Delay | β | 1.55 ns (C7 speed grade) |
| Maximum Internal Frequency | β | 562 MHz |
| High-Speed Interface | β | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| PLLs | β | 4 |
| Package Dimensions | β | 27 x 27 mm, 1.0 mm pitch |
| Operating Temperature Grade | β | Commercial (per 'C' suffix in speed grade) |
| Lead-Free | β | Yes |