EP2S15F672C3 vs EP2S15F672C4 Comparison
Detailed side-by-side comparison of EP2S15F672C3 by Intel and EP2S15F672C4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S15F672C3 | EP2S15F672C4 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $142.30 | $235.00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 15,600 |
| Embedded Memory (bits) | 419,328 | β |
| DSP Blocks (18-bit multipliers) | 156 | β |
| Maximum User I/O | 366 | β |
| Core Voltage | 1.2 V | β |
| Process Technology | 90 nm CMOS | β |
| Maximum Internal Frequency | [DATA_NEEDED: max internal clock MHz] | β |
| Package | 672-ball FC-FBGA | 672-ball FineLine BGA (FBGA) |
| Mounting Type | Surface Mount | β |
| Operating Temperature Grade | Commercial (C3 suffix) | β |
| Speed Grade | C3 (third commercial speed bin) | 4 |
| PLLs | [DATA_NEEDED: number of PLLs] | 6 |
| Global Clock Networks | [DATA_NEEDED: number of global clocks] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance per Altera product page] |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL moisture sensitivity level] |
| Embedded Memory Bits | β | 419,328 bits |
| DSP Blocks | β | 156 (approximate, per Stratix II family) |
| Maximum User I/Os | β | 366 |
| Process Node | β | 90 nm |
| Operating Temperature | β | Commercial (0C to +85C, 'C' suffix) |
| Configuration Method | β | Serial / Parallel (passive serial, fast passive parallel, JTAG) |
| I/O Standards Supported | β | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) |
| Lead-Free | β | [DATA_NEEDED: lead-free finish status] |