EP2S15F672C4 vs EP2S15F672C5 Comparison
Detailed side-by-side comparison of EP2S15F672C4 by Altera and EP2S15F672C5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S15F672C4 | EP2S15F672C5 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $235.00 | $199.00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 15,600 |
| Embedded Memory Bits | 419,328 bits | β |
| DSP Blocks | 156 (approximate, per Stratix II family) | β |
| Maximum User I/Os | 366 | β |
| Package | 672-ball FineLine BGA (FBGA) | β |
| Process Node | 90 nm | β |
| PLLs | 6 | β |
| Operating Temperature | Commercial (0C to +85C, 'C' suffix) | Commercial (0C to +85C) |
| Speed Grade | 4 | -5 (mid-tier) |
| Configuration Method | Serial / Parallel (passive serial, fast passive parallel, JTAG) | Passive Serial / Fast Passive Parallel / JTAG |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance per Altera product page] | Compliant (legacy lead-free version exists) |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | β |
| MSL Level | [DATA_NEEDED: MSL moisture sensitivity level] | β |
| Series | β | EP2S15 |
| CLBs | β | 6,240 |
| Memory Bits | β | 419,328 |
| Maximum User I/O | β | 366 |
| Operating Frequency (max) | β | 640 MHz |
| Package Type | β | 672-ball FineLine BGA (FBGA) |
| Package Dimensions | β | 27 mm x 27 mm |
| Ball Pitch | β | 1 mm |
| Process Technology | β | 90 nm CMOS |
| Voltage - Supply (VCCINT) | β | [DATA_NEEDED: VCCINT nominal] |
| Mounting Type | β | Surface Mount |