EP2S30F672C3N vs EP2S30F672I4 Comparison

Detailed side-by-side comparison of EP2S30F672C3N by Altera and EP2S30F672I4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S30F672C3N EP2S30F672I4
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $55.00 $695.00
Family Stratix II β€”
Number of Logic Elements (LEs) 33,880 β€”
Logic Array Blocks (LABs) 1,694 1694
Embedded Memory (Bits) 1,369,728 β€”
Embedded Memory (Kbits) 500 Kbits β€”
Number of I/Os 500 β€”
Number of Outputs 492 β€”
Core Voltage 1.2 V β€”
Process Technology 90 nm CMOS 90 nm CMOS
Maximum Internal Frequency 816.99 MHz (per published spec) β€”
Package 672-ball FineLine BGA (FC-FBGA) β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature Grade Commercial ("C") β€”
Speed Grade 3 β€”
Lead-Free / RoHS Pb-free (suffix "N") β€”
RoHS Status Compliant [DATA_NEEDED: confirm RoHS compliance on part label]
Series β€” Stratix II
Manufacturer β€” Intel (formerly Altera)
Logic Elements β€” 33880
Total RAM Bits β€” 1369728
Number of I/O β€” 500
DSP Blocks β€” 12 (per datasheet, family range)
Number of PLLs β€” 6
Voltage - Supply β€” 1.2 V core, separate I/O bank VCCIO
Operating Temperature β€” -40C to +100C (Industrial)
Package / Case β€” 672-BBGA, FCBGA (FBGA-672)
Package Dimensions β€” 35 x 35 mm
Ball Pitch β€” 1.0 mm
Configuration β€” JTAG, serial, parallel (Stratix II scheme)
MSL Level β€” 3 (per JEDEC J-STD-020)

Datasheets & Resources

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