EP2S30F672C5N vs EP2S30F672I4 Comparison

Detailed side-by-side comparison of EP2S30F672C5N by Intel and EP2S30F672I4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S30F672C5N EP2S30F672I4
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $450.00 $695.00
Series Stratix II Stratix II
Family Name Stratix II β€”
Logic Elements 33,880 33880
Embedded Memory (bits) 1,369,728 β€”
Logic Array Blocks (LABs) 1694 1694
User I/O Count 500 β€”
Package 672-ball FBGA (FineLine BGA) β€”
Speed Grade C5 (-5 commercial) β€”
Process Technology 90 nm CMOS 90 nm CMOS
Supply Voltage (Core) [DATA_NEEDED: core VCC value] β€”
Operating Temperature Range Commercial (0C to +85C) β€”
Number of PLLs 4 6
Global Clock Networks 16 β€”
Configuration Method Serial / Passive Parallel / Fast Passive Parallel β€”
Lead-Free / RoHS Yes (N suffix) β€”
Architecture Adaptive Logic Module (ALM) β€”
DSP Blocks [DATA_NEEDED: DSP block count] 12 (per datasheet, family range)
Multipliers [DATA_NEEDED: 18x18 multiplier count] β€”
Manufacturer β€” Intel (formerly Altera)
Total RAM Bits β€” 1369728
Number of I/O β€” 500
Voltage - Supply β€” 1.2 V core, separate I/O bank VCCIO
Operating Temperature β€” -40C to +100C (Industrial)
Mounting Type β€” Surface Mount
Package / Case β€” 672-BBGA, FCBGA (FBGA-672)
Package Dimensions β€” 35 x 35 mm
Ball Pitch β€” 1.0 mm
Configuration β€” JTAG, serial, parallel (Stratix II scheme)
MSL Level β€” 3 (per JEDEC J-STD-020)
RoHS Status β€” [DATA_NEEDED: confirm RoHS compliance on part label]

Datasheets & Resources

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