EP2S30F672I4 vs EP2S30F672C5NGC Comparison
Detailed side-by-side comparison of EP2S30F672I4 by Intel and EP2S30F672C5NGC by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S30F672I4 | EP2S30F672C5NGC |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $695.00 | $171.00 |
| Series | Stratix II | β |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements | 33880 | 33,880 |
| Logic Array Blocks (LABs) | 1694 | β |
| Total RAM Bits | 1369728 | 1,369,728 |
| Number of I/O | 500 | β |
| DSP Blocks | 12 (per datasheet, family range) | β |
| Number of PLLs | 6 | β |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | β |
| Operating Temperature | -40C to +100C (Industrial) | Commercial (0C to +85C) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Package / Case | 672-BBGA, FCBGA (FBGA-672) | β |
| Package Dimensions | 35 x 35 mm | β |
| Ball Pitch | 1.0 mm | β |
| Process Technology | 90 nm CMOS | 90 nm |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | β |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| RoHS Status | [DATA_NEEDED: confirm RoHS compliance on part label] | β |
| Family | β | Stratix II |
| Adaptive Logic Modules (ALMs) | β | [DATA_NEEDED: ALM count] |
| Embedded RAM (Kbits) | β | 1,337.6 Kbits |
| Hardware Multipliers (18x18) | β | 64 |
| Maximum User I/Os | β | 500 |
| User I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Core Supply Voltage | β | 1.2 V |
| Internal Performance | β | Up to 609.76 MHz |
| Package | β | 672-ball FC-FBGA |
| Speed Grade | β | C5 |
| Programmable Interface | β | PCI-X 32/64-bit, 66/100/133 MHz master/target |
| Lead-Free / RoHS | β | [DATA_NEEDED: lead-free status] |