EP2S60F1020C4 vs EP2S60F1020C4N Comparison
Detailed side-by-side comparison of EP2S60F1020C4 by Intel and EP2S60F1020C4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S60F1020C4 | EP2S60F1020C4N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,240.00 | $67.00 |
| Series | Stratix II | Stratix II |
| Logic Elements | 60,440 LE | 60,440 |
| Total Memory Bits | 2,544,192 bits | β |
| Number of LABs | 3022 | β |
| Number of User I/O | 718 | β |
| Number of Embedded Multipliers | [DATA_NEEDED: number of 18x18 multipliers] | β |
| Number of PLLs | [DATA_NEEDED: number of PLLs/DLLs] | β |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Operating Frequency | 711.24 MHz | β |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Speed Grade | -C4 (commercial) | β |
| Operating Temperature | 0C to +85C (commercial) | β |
| Package | 1020-ball FC-FBGA (FineLine BGA) | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | Compliant (lead-free per Intel/Altera product page) | EU RoHS compliant with exemption (per Arrow listing) |
| Family | β | Stratix II (EP2S60) |
| Adaptive Logic Modules (ALMs) | β | 30,220 (approx.) |
| Logic Array Blocks (LABs) | β | 3,022 |
| Embedded Memory (bits) | β | 2,544,192 |
| Embedded Memory Blocks | β | M512/M4K/M-RAM TriMatrix memory |
| DSP Blocks (18-bit x 18-bit) | β | Up to 48 (24 per DSP block column pair typical) |
| User I/Os | β | 718 |
| Maximum Core Frequency | β | 711.24 MHz (per Arrow listing) |
| Operating Temperature Grade | β | Commercial (C4 suffix indicates commercial, speed grade 4) |
| Configuration Modes | β | Passive Serial, Fast Passive Parallel, JTAG |
| PLLs / Clock Networks | β | Yes - on-chip PLLs and global clock networks |