EP2S60F1020C4N vs EP2S60F1020C3 Comparison

Detailed side-by-side comparison of EP2S60F1020C4N by Intel and EP2S60F1020C3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S60F1020C4N EP2S60F1020C3
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $67.00 $1,380.00
Series Stratix II Stratix II
Family Stratix II (EP2S60) Stratix II FPGA
Logic Elements 60,440 β€”
Adaptive Logic Modules (ALMs) 30,220 (approx.) β€”
Logic Array Blocks (LABs) 3,022 3022
Embedded Memory (bits) 2,544,192 β€”
Embedded Memory Blocks M512/M4K/M-RAM TriMatrix memory β€”
DSP Blocks (18-bit x 18-bit) Up to 48 (24 per DSP block column pair typical) β€”
User I/Os 718 β€”
Maximum Core Frequency 711.24 MHz (per Arrow listing) β€”
Core Voltage 1.2 V 1.2 V
Process Technology 90 nm CMOS 90 nm CMOS
Package 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) 1020-ball FC-FBGA
Mounting Type Surface Mount (BGA) Surface Mount
Operating Temperature Grade Commercial (C4 suffix indicates commercial, speed grade 4) β€”
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG β€”
PLLs / Clock Networks Yes - on-chip PLLs and global clock networks β€”
RoHS Status EU RoHS compliant with exemption (per Arrow listing) Compliant
Logic Elements (LEs) β€” 60,440
Total RAM Bits β€” 2,544,192 bits (2.5 Mbit)
User I/O Count β€” 718
Number of I/O Banks β€” [DATA_NEEDED: I/O banks]
DSP Blocks (18x18 multipliers) β€” 144 18x18 multipliers (36 DSP blocks)
PLLs β€” 12
Global Clock Networks β€” 18
Maximum Internal Frequency β€” 816.99 MHz
Operating Temperature β€” 0C to +85C (commercial, C3 speed grade)
Package Body Size β€” 33 mm x 33 mm, 1.0 mm ball pitch
Supplier Device Package β€” 1020-BGA
Speed Grade β€” C3

Datasheets & Resources

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