EP2S60F1020C4N vs EP2S60F1020C4TT Comparison

Detailed side-by-side comparison of EP2S60F1020C4N by Intel and EP2S60F1020C4TT by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP2S60F1020C4TT EP2S60F1020C4TT - Stratix II FPGA, 60K LE, 1020-BGA | Intel

EP2S60F1020C4TT - Stratix II FPGA, 60K LE, 1020-BGA | Intel

EP2S60F1020C4TT ⚠ Last Time Buy

Specification Comparison

Parameter EP2S60F1020C4N EP2S60F1020C4TT
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $67.00 $720.00
Series Stratix II β€”
Family Stratix II (EP2S60) Stratix II
Logic Elements 60,440 60,440
Adaptive Logic Modules (ALMs) 30,220 (approx.) β€”
Logic Array Blocks (LABs) 3,022 β€”
Embedded Memory (bits) 2,544,192 2,544,192
Embedded Memory Blocks M512/M4K/M-RAM TriMatrix memory β€”
DSP Blocks (18-bit x 18-bit) Up to 48 (24 per DSP block column pair typical) β€”
User I/Os 718 β€”
Maximum Core Frequency 711.24 MHz (per Arrow listing) β€”
Core Voltage 1.2 V β€”
Process Technology 90 nm CMOS 90 nm
Package 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) 1020-ball FineLine BGA
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Operating Temperature Grade Commercial (C4 suffix indicates commercial, speed grade 4) β€”
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG β€”
PLLs / Clock Networks Yes - on-chip PLLs and global clock networks β€”
RoHS Status EU RoHS compliant with exemption (per Arrow listing) [DATA_NEEDED: RoHS compliance]
Equivalent Logic Elements β€” 60,440
Maximum User I/O β€” 718
DSP Blocks (18x18 multipliers) β€” [DATA_NEEDED: DSP block count for EP2S60]
PLLs (Enhanced) β€” [DATA_NEEDED: PLL count]
Global Clock Networks β€” [DATA_NEEDED: global clock count]
Operating Junction Temperature β€” 0C to +85C (commercial, C4 speed grade)
Speed Grade β€” C4
Supply Voltage Core β€” [DATA_NEEDED: VCCINT nominal]
Memory Interfaces Supported β€” DDR/DDR2 SDRAM, QDR II/II+ SRAM
LE Conversion Note β€” 60,440 LEs is the legacy 'equivalent LE' figure; modern ALM-based naming differs
MSL Level β€” [DATA_NEEDED: moisture sensitivity level]

Datasheets & Resources

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