EP3SE110F1152C2NES vs EP3SE110F1152C3N Comparison
Detailed side-by-side comparison of EP3SE110F1152C2NES by Altera and EP3SE110F1152C3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N β Last Time BuySpecification Comparison
| Parameter | EP3SE110F1152C2NES | EP3SE110F1152C3N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,320.00 | $1,560.00 |
| Family | Stratix III Enhanced (EP3SE110) | Stratix III E |
| Manufacturer | Altera (Intel) | β |
| Process Technology | 65 nm | 65 nm TSMC |
| Logic Elements | 107,500 | β |
| User I/O Pins | 744 | β |
| Core Voltage | 1.1 V | β |
| Maximum Operating Frequency | 600 MHz | β |
| Package | FC-FBGA-1152 (Flip-Chip) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | [DATA_NEEDED: temperature grade] | β |
| Speed Grade | C2 | C3 |
| Memory Type | Embedded M9K blocks | M9K and M144K block RAM |
| DSP Blocks | Yes (variable-precision DSP) | Yes (embedded multipliers) |
| Transceivers | [DATA_NEEDED: transceiver count] | β |
| Configuration | SRAM-based, volatile | β |
| Programming Interface | JTAG / Passive Serial / Fast Passive Parallel | β |
| Toolchain | Quartus II (Stratix III support) | β |
| RoHS Status | Non-Compliant (per Kynix listing) | β |
| Series | β | Stratix III |
| Logic Elements (LE) | β | 107,500 |
| Logic Array Blocks (LABs) | β | 4,300 |
| Total RAM Bits | β | 8,936,448 |
| User I/Os | β | 744 |
| Operating Frequency (max) | β | 500 MHz |
| Core Supply Voltage | β | 1.1 V nominal |
| I/O Supply Voltage | β | [DATA_NEEDED: I/O supply range] |
| Package Type | β | FC-FBGA-1152 (flip-chip BGA) |
| Operating Temperature | β | 0 Β°C to 85 Β°C (commercial) |
| Mounting Style | β | SMD/SMT (Tray) |
| External Memory Support | β | DDR/DDR2/DDR3 with read/write leveling |
| Boundary Scan | β | IEEE 1149.1 (JTAG) |
| RoHS | β | [DATA_NEEDED: RoHS status] |
| Lead-Free | β | Yes (per Altera/Intel datasheet family convention) |