EP3SE260F1517I4LN vs EP3SE260F1517I4L Comparison
Detailed side-by-side comparison of EP3SE260F1517I4LN by Intel and EP3SE260F1517I4L by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SE260F1517I4LN - 260K LE Stratix III E FPGA, 1517-FCBGA | Intel
EP3SE260F1517I4LN β Last Time BuySpecification Comparison
| Parameter | EP3SE260F1517I4LN | EP3SE260F1517I4L |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2,895.00 | $2,800.00 |
| Logic Elements | 255,000 | 255,000 |
| Embedded Memory Bits | 16,672,768 bits (~2,044 KBytes) | β |
| Logic Array Blocks (LABs) | 10,200 | β |
| User I/O Count | 976 | β |
| Package | 1517-ball FCBGA (40 mm x 40 mm, 1.0 mm pitch) | β |
| Process Technology | 40 nm CMOS | 65 nm CMOS |
| Family | Stratix III E (Enhanced) | Stratix III Enhanced (E) |
| Speed Grade | I4 (industrial, 4th tier) | I4 |
| Power Option | L (low-power) | β |
| Operating Temperature | -40C to +100C (case, industrial) | -40C to +100C (Industrial) |
| Lead-Free / RoHS | Yes (N suffix) | Yes (L suffix) |
| Transceivers | Stratix III E family supports up to 24 transceivers up to 8.5 Gbps | β |
| DSP Blocks (18x18 multipliers) | Up to 384 (family-level, device-specific count not in provided data) | β |
| Partial Reconfiguration | Supported | β |
| Memory Interface Support | DDR3, DDR2, QDR II+ (hardened PHY) | β |
| Configuration Scheme | Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | β |
| Series | β | Stratix III |
| Embedded Memory | β | 16,672,768 bits (16.6 Mbits) |
| Maximum User I/O | β | 976 |
| Package Type | β | 1517-BBGA, FCBGA |
| Package Dimensions | β | 40 mm x 40 mm (BGA1517, 39x39, 1.0 mm pitch) |
| Mounting Type | β | Surface Mount |
| Temperature Grade | β | Industrial |
| Supply Voltage (Core) | β | [DATA_NEEDED: core voltage] |
| DSP Blocks (18x18 Multipliers) | β | 768 |
| Configuration Method | β | JTAG, Passive Serial, Fast Passive Parallel |
| MSL Level | β | 3 (per JEDEC J-STD-020) |
| RoHS Status | β | Compliant |