EP3SE260H780C4LN vs EP3SE260H780I4L Comparison

Detailed side-by-side comparison of EP3SE260H780C4LN by Intel and EP3SE260H780I4L by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP3SE260H780C4LN EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel

EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel

EP3SE260H780C4LN ⚠ Last Time Buy
Intel
EP3SE260H780I4L EP3SE260H780I4L - Stratix III E FPGA, 255K Logic Elements | Intel

EP3SE260H780I4L - Stratix III E FPGA, 255K Logic Elements | Intel

EP3SE260H780I4L ⚠ Last Time Buy

Specification Comparison

Parameter EP3SE260H780C4LN EP3SE260H780I4L
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $11,950.00 $1,395.00
Family Stratix III E Stratix III E (Enhanced)
Logic Elements 255,000 255,000
Embedded Memory 16,672,768 bits (16.67 Mbit) β€”
Logic Array Blocks (LABs) 10,200 β€”
Embedded Multipliers (18x18) 384 β€”
User I/O Count 488 488
Package 780-ball FCBGA (FineLine BGA) β€”
Speed Grade C4 (commercial, moderate speed) β€”
Operating Temperature 0C to +85C (commercial) Industrial, -40C to +85C
Core Voltage (VCC) 1.0 V β€”
I/O Voltage (VCCIO) 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) β€”
Auxiliary Voltage (VCCPD/VCCPT) 2.5 V / 3.0 V β€”
PLLs 8 β€”
Global Clock Networks 16 β€”
Process Node 40 nm TSMC β€”
Configuration Modes FPP, AS, PS, JTAG β€”
RoHS Status Compliant Compliant (lead-free)
MSL Level 3 (168 hours) β€”
Total Memory Bits β€” 16,672,640
Number of LABs/CLBs β€” [DATA_NEEDED: LAB count]
Core Voltage β€” 0.9 V
Process Technology β€” 65 nm
Package Type β€” 780-pin FC-HFBGA (flip-chip BGA)
Mounting Type β€” Surface Mount (flip-chip)
Number of Transceivers β€” 24 (family-level maximum, per-pin count depends on variant)
Max Transceiver Data Rate β€” 6.375 Gbps (Stratix III E family spec)
Number of 18x18 Multipliers β€” [DATA_NEEDED: per-package multiplier count]
Configuration Mode β€” JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel
Pin/Package β€” 780-BBGA, FCBGA (flip-chip)

Datasheets & Resources

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