EP3SL200H780I4 vs EP3SL200H780I4L Comparison
Detailed side-by-side comparison of EP3SL200H780I4 by Intel and EP3SL200H780I4L by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SL200H780I4
EP3SL200H780I4 - Stratix III L FPGA, 200K LE, 780-FCBGA | Intel
EP3SL200H780I4 NrndIntel
EP3SL200H780I4L
EP3SL200H780I4L - 200K Logic Elements Stratix III L FPGA | Intel
EP3SL200H780I4L NrndSpecification Comparison
| Parameter | EP3SL200H780I4 | EP3SL200H780I4L |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6,255.75 | $1,395.00 |
| Series | Stratix III L | β |
| Family | Stratix III | Stratix III L |
| Logic Elements (LE) | 200,000 | β |
| Logic Array Blocks (LABs) | 8000 | 8,000 |
| Embedded Memory Bits | 10,901,504 | β |
| User I/O Count | 488 | β |
| DSP Multipliers (18x18) | 384 | β |
| Voltage - Core Supply | 1.1 V | β |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Package Type | 780-BBGA / FCBGA (FC-HFBGA) | β |
| Package Dimensions | 33 mm x 33 mm | β |
| Speed Grade | I4 (industrial) | I4 (Industrial) |
| Operating Junction Temperature | -40C to +100C (industrial) | β |
| Configuration Memory | SRAM-based, volatile | β |
| RoHS Status | Compliant | Compliant |
| Design Tool | Quartus II (legacy) / Quartus Prime | β |
| Logic Elements | β | 200,000 |
| Embedded Memory (Bits) | β | 10,901,504 |
| Maximum User I/O | β | 488 |
| Core Supply Voltage | β | 0.86 V to 1.15 V |
| Internal Performance | β | 375 MHz |
| Package | β | 780-pin FC-HFBGA (Flip-Chip) |
| Mounting Type | β | Surface Mount |
| Operating Temperature | β | -40C to +100C (Industrial) |
| Transceivers | β | Up to 24 channels |
| Transceiver Data Rate | β | Up to 6.375 Gbps |
| DSP Blocks | β | 9x9 / 18x18 / 36x36 multipliers |
| Memory Interface Support | β | DDR3, DDR2, DDR, QDR II+, RLDRAM II |
| JTAG Support | β | IEEE Std 1149.1 Boundary-Scan |
| HardCopy Support | β | Compatible (Lattice-style migration path via HardCopy III) |