EP3SL340F1760I3 vs EP3SL340F1760C2 Comparison
Detailed side-by-side comparison of EP3SL340F1760I3 by Intel and EP3SL340F1760C2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SL340F1760I3 - Stratix III L FPGA, 337.5K LE, 1760-BGA | Intel
EP3SL340F1760I3 β Last Time Buy
Specification Comparison
| Parameter | EP3SL340F1760I3 | EP3SL340F1760C2 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,450.00 | $18,500.00 |
| Series | Stratix III L | Stratix III L |
| Logic Elements | 337,500 LE | β |
| LABs (Logic Array Blocks) | 13,500 | β |
| Embedded Memory Bits | 18,822,144 bit | β |
| User I/Os | 1120 | β |
| Number of Pins / Balls | 1760 | β |
| Package Type | FC-FBGA (1760-ball, FineLine BGA) | β |
| Package Code | BGA1760, 42x42, 40 | β |
| Core Voltage | 1.1 V | 0.9 V / 1.1 V |
| Process Technology | 65 nm | β |
| Operating Temperature | -40 Β°C to 100 Β°C (Industrial grade, I3 suffix) | 0C to +85C (Commercial, C2 suffix) |
| Speed Grade | I3 (Industrial, mid-speed bin) | β |
| Mounting Type | Surface Mount | β |
| RoHS Status | Compliant (Pb-free BGA balls) | Compliant |
| Configuration Memory | SRAM-based, volatile (requires external configuration device) | β |
| Transceivers | [DATA_NEEDED: transceiver count and data rate for this F1760 variant] | [DATA_NEEDED: transceiver count and max data rate] |
| DSP Blocks | [DATA_NEEDED: 18x18 multiplier count] | [DATA_NEEDED: DSP block count] |
| PLLs | [DATA_NEEDED: PLL count] | β |
| MSL Level | MSL3 (JEDEC J-STD-020, reflow 245 Β°C peak) | β |
| Family | β | Stratix III |
| Logic Elements (LE) | β | 337,500 |
| Logic Array Blocks (LABs) | β | 13,500 |
| Embedded Memory (bits) | β | 18,822,144 |
| User I/O Count | β | 1,120 |
| Maximum User I/O Voltage | β | 3.3 V (LVTTL/LVCMOS supporting up to 3.0 V LVDS) |
| Process Node | β | 40 nm TSMC |
| Package | β | 1760-ball FCBGA (FineLine BGA) |
| Ball Pitch | β | 1.0 mm |
| Configuration | β | SRAM-based, supports JTAG, FPP, AS, PS |
| Programmable Power Technology | β | Yes |
| PCIe Hard IP | β | Yes (Gen1/Gen2) |