EP610DC-20 vs EP610DI-25 Comparison
Detailed side-by-side comparison of EP610DC-20 by Intel and EP610DI-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC-20 | EP610DI-25 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.85 | $9.95 |
| Product Type | CMOS UV-Erasable Programmable Logic Device (EPLD) | β |
| Family | Classic EP610 | β |
| Logic Macrocells | 16 | β |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 (bidirectional) | 16 (bidirectional) |
| Total Usable Pins | 20 | β |
| Product Terms (p-terms) | 160 | β |
| Propagation Delay (tPD) | 22 ns | 25 ns |
| Maximum Toggle Frequency (fMAX) | 55.6 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V nominal |
| Operating Temperature | 0 Β°C to 70 Β°C (commercial) | Industrial (per "I" suffix) |
| Package | 24-pin Ceramic DIP (CDIP-24) with UV window | β |
| Programming Method | UV erasure + parallel programmer | β |
| Process Technology | CMOS, UV-erasable floating gate | β |
| Mounting Type | Through-hole | Through-Hole (DIP) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Part Family | β | Classic EPLD |
| Macrocells | β | 16 |
| Maximum Pipelined Clock Frequency | β | 100 MHz (max fCNT, per family datasheet) |
| Total User I/O | β | 20 |
| Technology | β | CMOS EPROM (UV-erasable) |
| Package Type | β | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 |
| Pin Count | β | 24 |
| Speed Grade Suffix | β | 25 = 25 ns |
| Compliance | β | RoHS status unknown (legacy 1990s part) |