EP610ILC-10 vs EP610DC-20 Comparison

Detailed side-by-side comparison of EP610ILC-10 by Altera and EP610DC-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP610DC-20

EP610DC-20 - 24-Pin CMOS UV PLD, 22ns Delay | Altera/Intel

EP610DC-20 Obsolete

Specification Comparison

Parameter EP610ILC-10 EP610DC-20
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.20 $15.85
Device Family Classic EPLD β€”
Product Type UV-Erasable / OTP PLD CMOS UV-Erasable Programmable Logic Device (EPLD)
Architecture PAL-type with macrocells β€”
Macrocells 16 β€”
Usable Gates 300 β€”
Product Terms 160 β€”
I/O Pins 16 16 (bidirectional)
Dedicated Inputs 4 4
Supply Voltage 5 V (single supply) β€”
Pin-to-Pin Delay (tPD) 10 ns (grade -10) β€”
Counter Frequency (fCNT) 100 MHz β€”
Logic Family Compatibility TTL (5 V CMOS/TTL-compatible I/O) β€”
Package PLCC-28 (plastic J-lead chip carrier) 24-pin Ceramic DIP (CDIP-24) with UV window
Mounting Type Surface Mount (PLCC socket or solder) Through-hole
Operating Temperature [DATA_NEEDED: operating temperature range] 0 Β°C to 70 Β°C (commercial)
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance status]
Family β€” Classic EP610
Logic Macrocells β€” 16
Total Usable Pins β€” 20
Product Terms (p-terms) β€” 160
Propagation Delay (tPD) β€” 22 ns
Maximum Toggle Frequency (fMAX) β€” 55.6 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Programming Method β€” UV erasure + parallel programmer
Process Technology β€” CMOS, UV-erasable floating gate
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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